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OPTIMUM-DERAM: Highly Consistent, Scalable, and Secure Multi-Object Memory using RLNC
arxiv.org·15h
📏Linear Memory
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Scalable Adaptive Memory Compiler Optimization via Multi-Objective Evolutionary Algorithms
dev.to·17h·
Discuss: DEV
🧠Memory Hierarchy
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SHADOW: Simultaneous Multi-Threading Architecture with Asymmetric Threads
danglingpointers.substack.com·1d·
Discuss: Substack
🤝Cooperative Threading
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FlashAttention 4: Faster, Memory-Efficient Attention for LLMs
digitalocean.com·8h
🗺️Region Inference
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One ISA, Infinite Use Cases: RISC-V and the Road to Workload-Specific Silicon
riscv.org·48m
🔧RISC-V
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Context Discipline and Performance Correlation: Analyzing LLM Performance and Quality Degradation Under Varying Context Lengths
arxiv.org·15h
🏁Language Benchmarks
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Next.js Caching and Rendering: A Complete Guide for 2026
future.forem.com·1d·
Discuss: DEV
⚡Cache Optimization
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ANN v3: 200ms p99 query latency over 100 billion vectors
turbopuffer.com·20h·
Discuss: Hacker News
⚡Cache-Aware Algorithms
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Making an LSP for great good
thunderseethe.dev·20h·
Discuss: Lobsters, Hacker News
✨Gleam
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DiskCache: Disk Backed Cache — DiskCache 5.6.1 documentation
grantjenks.com·22h
⚡Cache Optimization
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Heaps do lie: debugging a memory leak in vLLM.
mistral.ai·5h·
Discuss: Hacker News
📊Memory Profilers
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The three types of LLM workloads and how to serve them
modal.com·4h·
Discuss: Hacker News
📡Erlang BEAM
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The Algebra of Speed: Mathematical Foundations of Computational Performance
ttsugriy.github.io·3d·
Discuss: Hacker News
🧠Memory Hierarchy
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A Quest to Find the Fastest Search Stack
dev.to·6h·
Discuss: DEV
🗄️Database Engines
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Build Your Own Key-Value Storage Engine—Week 6
read.thecoder.cafe·7h
📦Compact Data
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CUDA Programming: From Zero to GPU Kernels
pythongiant.github.io·9h·
Discuss: Hacker News
🔀SIMD Programming
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32GB of RAM costs $300 now: How to survive without upgrading
howtogeek.com·1d
🧠Memory Models
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Shared execution plan cache for Amazon Aurora PostgreSQL
aws.amazon.com·1d·
Discuss: Hacker News
⚡Cache Optimization
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A Novel Side-channel Attack That Utilizes Memory Re-orderings (U. of Washington, Duke, UCSC et al.)
semiengineering.com·1h
📏Linear Memory
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Memory Addressing and Memory Mapped I/O | by Tom Herbert | Jan, 2026
medium.com·2d
💾Allocator Design
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